Texas-instruments TMS320DM644x User Manual download pdf (Page 25)

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3.7 GPIO Input Data Register (IN_DATA n)

Registers

The current state of the GPIO signals is read using the GPIO input data register (IN_DATA n).

• For GPIO signals configured as inputs, reading IN_DATA n returns the state of the input signal

synchronized to the GPIO peripheral clock.

• For GPIO signals configured as outputs, reading IN_DATA n returns the output value being driven by

the device.

The GPIO input data register (IN_DATA01) is shown in Figure 16 , IN_DATA23 is shown in Figure 17 ,

IN_DATA4 is shown in Figure 18 , and described in Table 11 . See Table 1 to determine the IN_DATA n bit

associated with each GPIO bank and pin number.

Figure 16. GPIO Banks 0 and 1 Input Data Register (IN_DATA01)

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IN31 IN30 IN29 IN28 IN27 IN26 IN25 IN24 IN23 IN22 IN21 IN20 IN19 IN18 IN17 IN16

R-0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IN15 IN14 IN13 IN12 IN11 IN10 IN9 IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0

R-0

LEGEND: R = Read only; - n = value after reset

Figure 17. GPIO Banks 2 and 3 Input Data Register (IN_DATA23)

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IN63 IN62 IN61 IN60 IN59 IN58 IN57 IN56 IN55 IN54 IN53 IN52 IN51 IN50 IN49 IN48

R-0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IN47 IN46 IN45 IN44 IN43 IN42 IN41 IN40 IN39 IN38 IN37 IN36 IN35 IN34 IN33 IN32

R-0

LEGEND: R = Read only; - n = value after reset

Figure 18. GPIO Bank 4 Input Data Register (IN_DATA4)

31 16

Reserved

R-0

15 7 6 5 4 3 2 1 0

Reserved IN70 IN69 IN68 IN67 IN66 IN65 IN64

R-0 R-0

LEGEND: R = Read only; - n = value after reset

Table 11. GPIO Input Data Register (IN_DATA n) Field Descriptions

Bit Field Value Description

31-16 IN n Status of GPIO pin n. Reading the IN n bit returns the state of pin n on GPIO bank 2 I + 1. This bit field

returns the status of the GPIO pins on GPIO banks 1 and 3.

0 GPIO pin n is logic low.

1 GPIO pin n is logic high.

15-0 IN n Status of GPIO pin n. Reading the IN n bit returns the state of pin n on GPIO bank 2 I. This bit field returns

the status of the GPIO pins on GPIO banks 0, 2 and 4.

0 GPIO pin n is logic low.

1 GPIO pin n is logic high.

SPRUE25 – December 2005 General-Purpose Input/Output (GPIO) 25

1 2 ... 20 21 22 23 24 25 26 27 28 29 30 ... 35 36

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Texas-instruments TMS320DM644x User Manual Page 25

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