Texas Instruments TAS5066PAG User Manual

Browse online or download User Manual for Power supply units Texas Instruments TAS5066PAG. Texas Instruments TAS5066PAG User's Manual

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March 2004 Digital Audio and Video Products
Users Guide
SLEU052
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Summary of Contents

Page 1 - User’s Guide

 E       !""   #

Page 2

TAS5066-5111D6EVM Features1-21.1 TAS5066-5111D6EVM Features- 6-channel PurePath Digitalt evaluation module- Self-contained protection system (short ci

Page 3

PCB Key Map1-3Overview1.2 PCB Key MapThe physical structure for the TAS5066−5111D6EVM is illustrated in the fol-lowing figure.Figure 1−2. Physical Str

Page 5 - 

2-1System Interfaces  This chapter describes the TAS5066−5111D6EVM board in regards to powersupply (PSU) and system interfaces.Topic

Page 6 - Trademarks

PSU Interface (J901)2-22.1 PSU Interface (J901)The TAS5066−5111D6EVM module must be powered from one or two exter-nal regulated power supplies. High a

Page 7 - 

PSU Interface (J901)2-3System InterfacesFigure 2−2. J901 and J903 Pin Numbers (PCB Connector Top View)4321Table 2−2.J901 Pin DescriptionPin Number Net

Page 8 - Contents

PSU Control Interface (J902)2-42.2 PSU Control Interface (J902)This interface is used for on-board sensing of output supply voltage and forpower suppl

Page 9 - 

Loudspeaker Connectors (J100 − J600)2-5System Interfaces2.3 Loudspeaker Connectors (J100 − J600)Both positive and negative speaker outputs are floatin

Page 10

Control Interface (J50)2-62.4 Control Interface (J50)This interface connects the TAS5066-5111D6EVM board to a TI input board.Table 2−6.J50 Pin Descrip

Page 11 - 1.2 PCB Key Map

Digital Audio Interface (J51)2-7System Interfaces2.5 Digital Audio Interface (J51)The digital audio interface contains digital audio signal data (I2S)

Page 12

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvemen

Page 13 -  

PWM Timing, Interchannel Delay Registers2-82.6 PWM Timing, Interchannel Delay RegistersFor maximum performance, the PWM timing must be optimized for t

Page 14 - 2.1 PSU Interface (J901)

3-1Protection This chapter describes the short circuit protection and fault reporting circuitryof the TAS5111 device.Topic Page3.1 Short Cir

Page 15

Short Circuit Protection and Fault Reporting Circuitry3-23.1 Short Circuit Protection and Fault Reporting CircuitryTAS5111 is a self-protecting device

Page 16

EVM IMPORTANT NOTICETexas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation kit being sold by TI is int

Page 17

EVM WARNINGS AND RESTRICTIONSIt is important to operate this EVM within the input voltage range of xxx V and the outputvoltage range of xxx V and xxx

Page 18 - 2.4 Control Interface (J50)

Notational Conventionsv PrefaceAbout This ManualThis manual describes the operation of the TAS5066-5111D6EVM evaluationmodule from Tex

Page 19 - Table 2−8.Clock Rates

TrademarksviRelated Documentation from Texas InstrumentsThe following table contains a list of data manuals that have detailed descrip-tions of the in

Page 20

Contentsvii 1 Overview 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Page 21 - 

Contentsviii1−1 Complete PurePath Digital System 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Page 22 - 3.2 Device Fault Reporting

1-1Overview The TAS5066−5111D6EVM PurePath Digitalt customer evaluation moduledemonstrates two integrated circuits TAS5066 and TAS5111DAD from

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